Integrated circuit devices are widely used in many consumers, commercial and other applications. In order to increase the integration density of the integrated circuit devices, it may be desirable to form smaller and smaller devices.
Generally, memory devices such as dynamic random access memory (DRAM) and logic devices include capacitors. As is well known to those having skill in the art, a capacitor includes two closely spaced apart electrodes with a dielectric therebetween. A lower or bottom electrode may be referred to as a “storage electrode”, and an upper or top electrode may be referred to as a “plate electrode”. It is generally desirable for a capacitor to have a fixed density and stable properties relative to an applied voltage. A capacitor having a polysilicon insulator polysilicon (PIP) structure has been widely employed in memory devices or logic devices. Since polysilicon is stable at a high temperature and a chemical vapor deposition (CVD) process may be used, the capacitor of the PIP structure may be easily manufactured.
However, a capacitance of the capacitor having the PIP structure may vary in accordance with an applied voltage. Particularly, depletion layers may be formed between the lower electrode and an insulation layer and between the insulation layer and the upper electrode when a voltage is applied to the capacitor having the PIP structure, because the lower and the upper electrodes include doped polysilicon. As the depletion layers are formed, a thickness of the insulation layer may increase so that the capacitor may not have a stable capacitance. Further, the capacitance of the capacitor having the PIP structure may be reduced further when the capacitor is employed in a highly integrated semiconductor device having a design rule below about 90 nm.
A capacitor having a metal-insulator-metal (MIM) structure has also been developed. The capacitor of the MIM structure includes electrodes composed of metal. For example, Korean Laid-Open Patent Publication No. 2003-2905 discloses a method of forming a capacitor having a MIM structure. In the method of forming the capacitor, a dielectric layer including tantalum oxide is formed on a lower electrode of titanium aluminum nitride. A heat treatment process is performed on the dielectric layer at a temperature of about 300° C. to about 500° C. using an oxygen plasma or UV/O3 so as to re-oxidize the dielectric layer. Then, a rapid thermal process or a furnace annealing process is executed on the dielectric layer. When the dielectric layer is re-oxidized and thermally treated, an aluminum oxide layer is formed between the lower electrode and the dielectric layer. The aluminum oxide layer may prevent an oxidation of the lower electrode.
However, a thickness of the aluminum oxide layer formed at the interface between the lower electrode and the dielectric layer may be large during re-oxidizing and thermally treating the dielectric layer at a high temperature. The aluminum oxide layer has a low dielectric constant such that dielectric characteristics of the dielectric layer may be deteriorated when the aluminum oxide layer is thick. As a result, the capacitor including the aluminum oxide layer may have a lower capacitance.